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Server IP : 79.136.114.73 / Your IP : 3.144.100.199 Web Server : Apache/2.4.7 (Ubuntu) PHP/5.5.9-1ubuntu4.29 OpenSSL/1.0.1f System : Linux b8009 3.13.0-170-generic #220-Ubuntu SMP Thu May 9 12:40:49 UTC 2019 x86_64 User : www-data ( 33) PHP Version : 5.5.9-1ubuntu4.29 Disable Function : pcntl_alarm,pcntl_fork,pcntl_waitpid,pcntl_wait,pcntl_wifexited,pcntl_wifstopped,pcntl_wifsignaled,pcntl_wexitstatus,pcntl_wtermsig,pcntl_wstopsig,pcntl_signal,pcntl_signal_dispatch,pcntl_get_last_error,pcntl_strerror,pcntl_sigprocmask,pcntl_sigwaitinfo,pcntl_sigtimedwait,pcntl_exec,pcntl_getpriority,pcntl_setpriority, MySQL : ON | cURL : ON | WGET : ON | Perl : ON | Python : ON | Sudo : ON | Pkexec : ON Directory : /lib/modules/3.13.0-49-generic/build/include/linux/mfd/pcf50633/ |
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#ifndef __LINUX_MFD_PCF50633_PMIC_H #define __LINUX_MFD_PCF50633_PMIC_H #include <linux/mfd/pcf50633/core.h> #include <linux/platform_device.h> #define PCF50633_REG_AUTOOUT 0x1a #define PCF50633_REG_AUTOENA 0x1b #define PCF50633_REG_AUTOCTL 0x1c #define PCF50633_REG_AUTOMXC 0x1d #define PCF50633_REG_DOWN1OUT 0x1e #define PCF50633_REG_DOWN1ENA 0x1f #define PCF50633_REG_DOWN1CTL 0x20 #define PCF50633_REG_DOWN1MXC 0x21 #define PCF50633_REG_DOWN2OUT 0x22 #define PCF50633_REG_DOWN2ENA 0x23 #define PCF50633_REG_DOWN2CTL 0x24 #define PCF50633_REG_DOWN2MXC 0x25 #define PCF50633_REG_MEMLDOOUT 0x26 #define PCF50633_REG_MEMLDOENA 0x27 #define PCF50633_REG_LDO1OUT 0x2d #define PCF50633_REG_LDO1ENA 0x2e #define PCF50633_REG_LDO2OUT 0x2f #define PCF50633_REG_LDO2ENA 0x30 #define PCF50633_REG_LDO3OUT 0x31 #define PCF50633_REG_LDO3ENA 0x32 #define PCF50633_REG_LDO4OUT 0x33 #define PCF50633_REG_LDO4ENA 0x34 #define PCF50633_REG_LDO5OUT 0x35 #define PCF50633_REG_LDO5ENA 0x36 #define PCF50633_REG_LDO6OUT 0x37 #define PCF50633_REG_LDO6ENA 0x38 #define PCF50633_REG_HCLDOOUT 0x39 #define PCF50633_REG_HCLDOENA 0x3a #define PCF50633_REG_HCLDOOVL 0x40 enum pcf50633_regulator_enable { PCF50633_REGULATOR_ON = 0x01, PCF50633_REGULATOR_ON_GPIO1 = 0x02, PCF50633_REGULATOR_ON_GPIO2 = 0x04, PCF50633_REGULATOR_ON_GPIO3 = 0x08, }; #define PCF50633_REGULATOR_ON_MASK 0x0f enum pcf50633_regulator_phase { PCF50633_REGULATOR_ACTPH1 = 0x00, PCF50633_REGULATOR_ACTPH2 = 0x10, PCF50633_REGULATOR_ACTPH3 = 0x20, PCF50633_REGULATOR_ACTPH4 = 0x30, }; #define PCF50633_REGULATOR_ACTPH_MASK 0x30 enum pcf50633_regulator_id { PCF50633_REGULATOR_AUTO, PCF50633_REGULATOR_DOWN1, PCF50633_REGULATOR_DOWN2, PCF50633_REGULATOR_LDO1, PCF50633_REGULATOR_LDO2, PCF50633_REGULATOR_LDO3, PCF50633_REGULATOR_LDO4, PCF50633_REGULATOR_LDO5, PCF50633_REGULATOR_LDO6, PCF50633_REGULATOR_HCLDO, PCF50633_REGULATOR_MEMLDO, }; #endif