| Server IP : 79.136.114.73 / Your IP : 18.116.26.90 Web Server : Apache/2.4.7 (Ubuntu) PHP/5.5.9-1ubuntu4.29 OpenSSL/1.0.1f System : Linux b8009 3.13.0-170-generic #220-Ubuntu SMP Thu May 9 12:40:49 UTC 2019 x86_64 User : www-data ( 33) PHP Version : 5.5.9-1ubuntu4.29 Disable Function : pcntl_alarm,pcntl_fork,pcntl_waitpid,pcntl_wait,pcntl_wifexited,pcntl_wifstopped,pcntl_wifsignaled,pcntl_wexitstatus,pcntl_wtermsig,pcntl_wstopsig,pcntl_signal,pcntl_signal_dispatch,pcntl_get_last_error,pcntl_strerror,pcntl_sigprocmask,pcntl_sigwaitinfo,pcntl_sigtimedwait,pcntl_exec,pcntl_getpriority,pcntl_setpriority, MySQL : ON | cURL : ON | WGET : ON | Perl : ON | Python : ON | Sudo : ON | Pkexec : ON Directory : /lib/modules/3.13.0-49-generic/build/arch/unicore32/include/mach/ |
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/* * PKUnity Direct Memory Access Controller (DMAC) */ /* * Interrupt Status Reg DMAC_ISR. */ #define DMAC_ISR (PKUNITY_DMAC_BASE + 0x0020) /* * Interrupt Transfer Complete Status Reg DMAC_ITCSR. */ #define DMAC_ITCSR (PKUNITY_DMAC_BASE + 0x0050) /* * Interrupt Transfer Complete Clear Reg DMAC_ITCCR. */ #define DMAC_ITCCR (PKUNITY_DMAC_BASE + 0x0060) /* * Interrupt Error Status Reg DMAC_IESR. */ #define DMAC_IESR (PKUNITY_DMAC_BASE + 0x0080) /* * Interrupt Error Clear Reg DMAC_IECR. */ #define DMAC_IECR (PKUNITY_DMAC_BASE + 0x0090) /* * Enable Channels Reg DMAC_ENCH. */ #define DMAC_ENCH (PKUNITY_DMAC_BASE + 0x00B0) /* * DMA control reg. Space [byte] */ #define DMASp 0x00000100 /* * Source Addr DMAC_SRCADDR(ch). */ #define DMAC_SRCADDR(ch) (PKUNITY_DMAC_BASE + (ch)*DMASp + 0x00) /* * Destination Addr DMAC_DESTADDR(ch). */ #define DMAC_DESTADDR(ch) (PKUNITY_DMAC_BASE + (ch)*DMASp + 0x04) /* * Control Reg DMAC_CONTROL(ch). */ #define DMAC_CONTROL(ch) (PKUNITY_DMAC_BASE + (ch)*DMASp + 0x0C) /* * Configuration Reg DMAC_CONFIG(ch). */ #define DMAC_CONFIG(ch) (PKUNITY_DMAC_BASE + (ch)*DMASp + 0x10) #define DMAC_IR_MASK FMASK(6, 0) /* * select channel (ch) */ #define DMAC_CHANNEL(ch) FIELD(1, 1, (ch)) #define DMAC_CONTROL_SIZE_BYTE(v) (FIELD((v), 12, 14) | \ FIELD(0, 3, 9) | FIELD(0, 3, 6)) #define DMAC_CONTROL_SIZE_HWORD(v) (FIELD((v) >> 1, 12, 14) | \ FIELD(1, 3, 9) | FIELD(1, 3, 6)) #define DMAC_CONTROL_SIZE_WORD(v) (FIELD((v) >> 2, 12, 14) | \ FIELD(2, 3, 9) | FIELD(2, 3, 6)) #define DMAC_CONTROL_DI FIELD(1, 1, 13) #define DMAC_CONTROL_SI FIELD(1, 1, 12) #define DMAC_CONTROL_BURST_1BYTE (FIELD(0, 3, 3) | FIELD(0, 3, 0)) #define DMAC_CONTROL_BURST_4BYTE (FIELD(3, 3, 3) | FIELD(3, 3, 0)) #define DMAC_CONTROL_BURST_8BYTE (FIELD(5, 3, 3) | FIELD(5, 3, 0)) #define DMAC_CONTROL_BURST_16BYTE (FIELD(7, 3, 3) | FIELD(7, 3, 0)) #define DMAC_CONFIG_UART0_WR (FIELD(2, 4, 11) | FIELD(1, 2, 1)) #define DMAC_CONFIG_UART0_RD (FIELD(2, 4, 7) | FIELD(2, 2, 1)) #define DMAC_CONFIG_UART1_WR (FIELD(3, 4, 11) | FIELD(1, 2, 1)) #define DMAC_CONFIG_UART1RD (FIELD(3, 4, 7) | FIELD(2, 2, 1)) #define DMAC_CONFIG_AC97WR (FIELD(4, 4, 11) | FIELD(1, 2, 1)) #define DMAC_CONFIG_AC97RD (FIELD(4, 4, 7) | FIELD(2, 2, 1)) #define DMAC_CONFIG_MMCWR (FIELD(7, 4, 11) | FIELD(1, 2, 1)) #define DMAC_CONFIG_MMCRD (FIELD(7, 4, 7) | FIELD(2, 2, 1)) #define DMAC_CONFIG_MASKITC FIELD(1, 1, 4) #define DMAC_CONFIG_MASKIE FIELD(1, 1, 3) #define DMAC_CONFIG_EN FIELD(1, 1, 0)