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/* * Copyright 2012 Tilera Corporation. All Rights Reserved. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation, version 2. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or * NON INFRINGEMENT. See the GNU General Public License for * more details. */ /* Machine-generated file; do not edit. */ #ifndef __ARCH_TRIO_PCIE_INTFC_DEF_H__ #define __ARCH_TRIO_PCIE_INTFC_DEF_H__ #define TRIO_PCIE_INTFC_MAC_INT_STS 0x0000 #define TRIO_PCIE_INTFC_MAC_INT_STS__INT_LEVEL_MASK 0xf000 #define TRIO_PCIE_INTFC_PORT_CONFIG 0x0018 #define TRIO_PCIE_INTFC_PORT_CONFIG__STRAP_STATE_VAL_DISABLED 0x0 #define TRIO_PCIE_INTFC_PORT_CONFIG__STRAP_STATE_VAL_AUTO_CONFIG_ENDPOINT 0x1 #define TRIO_PCIE_INTFC_PORT_CONFIG__STRAP_STATE_VAL_AUTO_CONFIG_RC 0x2 #define TRIO_PCIE_INTFC_PORT_CONFIG__STRAP_STATE_VAL_AUTO_CONFIG_ENDPOINT_G1 0x3 #define TRIO_PCIE_INTFC_PORT_CONFIG__STRAP_STATE_VAL_AUTO_CONFIG_RC_G1 0x4 #define TRIO_PCIE_INTFC_PORT_CONFIG__STRAP_STATE_VAL_AUTO_XLINK 0x5 #define TRIO_PCIE_INTFC_PORT_CONFIG__STRAP_STATE_VAL_STREAM_X1 0x6 #define TRIO_PCIE_INTFC_PORT_CONFIG__STRAP_STATE_VAL_STREAM_X4 0x7 #define TRIO_PCIE_INTFC_PORT_STATUS 0x0020 #define TRIO_PCIE_INTFC_TX_FIFO_CTL 0x0050 #endif /* !defined(__ARCH_TRIO_PCIE_INTFC_DEF_H__) */