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/* * Copyright (C) 2012 ARM Ltd. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program. If not, see <http://www.gnu.org/licenses/>. */ #ifndef __ASM_PGTABLE_3LEVEL_HWDEF_H #define __ASM_PGTABLE_3LEVEL_HWDEF_H /* * With LPAE and 4KB pages, there are 3 levels of page tables. Each level has * 512 entries of 8 bytes each, occupying a 4K page. The first level table * covers a range of 512GB, each entry representing 1GB. The user and kernel * address spaces are limited to 512GB each. */ #define PTRS_PER_PTE 512 #define PTRS_PER_PMD 512 #define PTRS_PER_PGD 512 /* * PGDIR_SHIFT determines the size a top-level page table entry can map. */ #define PGDIR_SHIFT 30 #define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT) #define PGDIR_MASK (~(PGDIR_SIZE-1)) /* * PMD_SHIFT determines the size a middle-level page table entry can map. */ #define PMD_SHIFT 21 #define PMD_SIZE (_AC(1, UL) << PMD_SHIFT) #define PMD_MASK (~(PMD_SIZE-1)) /* * section address mask and size definitions. */ #define SECTION_SHIFT 21 #define SECTION_SIZE (_AC(1, UL) << SECTION_SHIFT) #define SECTION_MASK (~(SECTION_SIZE-1)) #endif