| Server IP : 79.136.114.73 / Your IP : 52.14.93.216 Web Server : Apache/2.4.7 (Ubuntu) PHP/5.5.9-1ubuntu4.29 OpenSSL/1.0.1f System : Linux b8009 3.13.0-170-generic #220-Ubuntu SMP Thu May 9 12:40:49 UTC 2019 x86_64 User : www-data ( 33) PHP Version : 5.5.9-1ubuntu4.29 Disable Function : pcntl_alarm,pcntl_fork,pcntl_waitpid,pcntl_wait,pcntl_wifexited,pcntl_wifstopped,pcntl_wifsignaled,pcntl_wexitstatus,pcntl_wtermsig,pcntl_wstopsig,pcntl_signal,pcntl_signal_dispatch,pcntl_get_last_error,pcntl_strerror,pcntl_sigprocmask,pcntl_sigwaitinfo,pcntl_sigtimedwait,pcntl_exec,pcntl_getpriority,pcntl_setpriority, MySQL : ON | cURL : ON | WGET : ON | Perl : ON | Python : ON | Sudo : ON | Pkexec : ON Directory : /lib/modules/3.13.0-35-generic/build/arch/arm/mach-w90x900/include/mach/ |
Upload File : |
/* * arch/arm/mach-w90x900/include/mach/regs-clock.h * * Copyright (c) 2008 Nuvoton technology corporation. * * Wan ZongShun <mcuos.com@gmail.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation;version 2 of the License. * */ #ifndef __ASM_ARCH_REGS_CLOCK_H #define __ASM_ARCH_REGS_CLOCK_H /* Clock Control Registers */ #define CLK_BA W90X900_VA_CLKPWR #define REG_CLKEN (CLK_BA + 0x00) #define REG_CLKSEL (CLK_BA + 0x04) #define REG_CLKDIV (CLK_BA + 0x08) #define REG_PLLCON0 (CLK_BA + 0x0C) #define REG_PLLCON1 (CLK_BA + 0x10) #define REG_PMCON (CLK_BA + 0x14) #define REG_IRQWAKECON (CLK_BA + 0x18) #define REG_IRQWAKEFLAG (CLK_BA + 0x1C) #define REG_IPSRST (CLK_BA + 0x20) #define REG_CLKEN1 (CLK_BA + 0x24) #define REG_CLKDIV1 (CLK_BA + 0x28) /* Define PLL freq setting */ #define PLL_DISABLE 0x12B63 #define PLL_66MHZ 0x2B63 #define PLL_100MHZ 0x4F64 #define PLL_120MHZ 0x4F63 #define PLL_166MHZ 0x4124 #define PLL_200MHZ 0x4F24 /* Define AHB:CPUFREQ ratio */ #define AHB_CPUCLK_1_1 0x00 #define AHB_CPUCLK_1_2 0x01 #define AHB_CPUCLK_1_4 0x02 #define AHB_CPUCLK_1_8 0x03 /* Define APB:AHB ratio */ #define APB_AHB_1_2 0x01 #define APB_AHB_1_4 0x02 #define APB_AHB_1_8 0x03 /* Define clock skew */ #define DEFAULTSKEW 0x48 #endif /* __ASM_ARCH_REGS_CLOCK_H */